0:02 we have an engineering puzzle for you
0:04 let's set it up
0:06 first here's just one of the hundreds of
0:09 millions of nanoscopic charge trap flash
0:10 memory cells
0:13 used to store information in your smartphone
0:14 smartphone
0:17 computer tablet and dozens of other devices
0:18 devices
0:21 second it's composed of three functional
0:25 sections a gate a charge trap
0:28 and a channel with dielectric barriers
0:29 used to separate
0:32 each section third this memory cell can
0:34 be used to store
0:37 one bit of information either a zero or
0:37 a one
0:40 using electrons in the charge strap if
0:43 there are electrons on the charge strap
0:46 it's a zero if there are no electrons
0:50 it's a one and fourth solid state drives
0:53 worked this way about a decade ago so
0:55 the puzzle is
0:58 how do we increase the storage capacity
0:58 of this one
1:01 charge trap memory cell so that it can store
1:02 store
1:05 a value from zero to seven or
1:08 three bits of information instead of just
1:08 just
1:12 zero or one or one bit of information
1:15 in other words how can one memory cell
1:17 with a single charge trap
1:20 be manipulated or engineered so that it
1:23 can store three bits of information
1:26 or one of eight different values
1:29 by the way there are hundreds of
1:31 millions of memory cells
1:33 inside just one of these flash memory microchips
1:35 microchips
1:37 and there are 18 of these microchips
1:39 inside this particular
1:42 enterprise-class solid-state drive from keoksia
1:44 keoksia
1:46 it's rather fitting that keyoxia was
1:48 willing to sponsor this video
1:50 because under their company's former
1:52 name toshiba memory
1:56 they invented nand flash memory in 1987
2:00 but we'll discuss them more later
2:02 to start let's give a little more context
2:03 context
2:06 this insanely small memory cell
2:09 is just one of hundreds of millions of
2:11 memory cells in your smartphone
2:14 which are organized one hundred layers tall
2:15 tall
2:18 forty thousand columns wide and fifty
2:20 thousand rows down
2:24 the overall structure is called 3d nand
2:26 here's a sheet of paper and a one euro
2:27 cent coin
2:29 so you can get a sense of the height and
2:31 scale of these cells
2:34 let's zoom back into an individual
2:35 memory cell
2:37 this memory cell is composed of
2:40 concentric cylinders which are a result
2:43 of manufacturing these cells in vertical columns
2:44 columns
2:46 let's focus on a cutaway of the cylinder
2:48 to make it easier to visualize and
2:50 understand what's happening
2:52 as mentioned before here we have the gate
2:53 gate
2:56 the charge trap and the channel and each
2:58 of these sections is separated by a dielectric
2:59 dielectric
3:02 that acts as an electric insulator and
3:04 prevents the flow of electrons between
3:07 sections but allows electric fields to
3:09 pass through
3:11 in the center is a non-conductive
3:12 material called
3:15 core filler but it's just there for
3:16 structural support
3:18 and not much else so we're going to
3:21 remove it
3:23 the first step for solving our puzzle is
3:25 that we have to understand how this
3:28 memory cell reads out information
3:31 to begin let's simplify the design and
3:33 remove the charge trap
3:36 and we're left with a basic transistor
3:39 the gate controls whether electrons can flow
3:39 flow
3:42 through the channel normally the channel
3:44 doesn't allow electrons to flow through it
3:44 it
3:47 in other words the channel is normally off
3:48 off
3:51 electrons are there it's just that they
3:52 can't flow
3:55 however when a voltage is applied to the gate
3:55 gate
3:58 an electric field is emitted from the
4:00 gate which turns the channel on
4:02 and thus allows electrons to flow
4:04 through the channel
4:06 the minimum voltage required to turn on
4:07 the channel
4:10 is called the threshold voltage which is
4:11 a key term
4:14 that will get used a lot in this episode
4:17 understanding this concept is important so
4:17 so
4:20 to repeat when reading information from
4:21 a memory cell
4:24 if the gate voltage is below the threshold
4:24 threshold
4:28 the channel is off and electrons can't
4:29 flow through the channel
4:31 but when the gate voltage is above the threshold
4:32 threshold
4:36 the channel is on and electrons can flow
4:37 through it
4:39 what we've covered are some transistor basics
4:40 basics
4:42 which makes sense as this charge trap
4:44 flash memory cell
4:46 evolved from a floating gate transistor and
4:47 and
4:50 transistors in general now let's put the
4:51 charge strap
4:53 back into the middle to turn the
4:56 transistor into a memory cell
4:59 when we place electrons or charges onto
5:01 the charge trap located between the channel
5:02 channel
5:05 and the gate and when a voltage
5:08 just above the threshold voltage is
5:09 applied to the gate
5:12 the electrons in the charge trap disrupt
5:13 the electric
5:15 field emitted from the voltage on the gate
5:16 gate
5:18 and the channel is prevented from
5:20 turning on
5:23 in other words the charge is stored in
5:24 the charge trap
5:27 inhibit the gate's ability to turn the
5:28 channel on
5:30 in order to overpower the inhibiting
5:31 electric field
5:34 caused by the electrons on the charge trap
5:34 trap
5:36 a stronger voltage on the gate is required
5:38 required
5:40 in essence the electrons in the charge trap
5:41 trap
5:43 shift the threshold voltage of the
5:44 memory cell
5:46 by using the difference in threshold
5:49 voltages between a charge trap with
5:50 stored electrons
5:52 and a charge drop without stored electrons
5:53 electrons
5:57 we can store and read different values
5:59 if you're confused don't worry we'll
6:01 explain this concept further
6:05 but for now let's quickly recap
6:07 applying a voltage to the gate that is
6:10 greater than the threshold voltage
6:12 causes the channel to turn on thus
6:15 allowing electrons to flow through it
6:18 if the applied voltage is less than the threshold
6:19 threshold
6:22 then the channel is off and the presence
6:23 of more
6:26 or fewer electrons in the charge trap can
6:26 can
6:29 shift this threshold voltage now
6:31 let's demonstrate how we use this
6:33 phenomenon to store
6:36 information inside each memory cell
6:39 to do that let's bring back the other
6:41 parts of the charge trap flash memory cell
6:42 cell
6:44 and duplicate it so that we have two
6:46 memory cells
6:48 the one on the left has no electrons in
6:50 its charge trap
6:52 and the one on the right has a lot of electrons
6:54 electrons
6:57 when a small voltage is applied to both
7:00 only the channel on the left the memory
7:03 cell with no electrons on its charge trap
7:03 trap
7:06 turns on this is because the electrons
7:08 on the charge trap of the right memory cell
7:09 cell
7:11 inhibit the gate's ability to turn the
7:13 channel on
7:16 next a higher voltage is applied to both gates
7:17 gates
7:19 and thus the electric field on the right
7:20 memory cell's gate
7:22 becomes strong enough to overcome the
7:24 inhibiting effect of the electrons on
7:26 the charge trap
7:28 and its channel turns on as a result of
7:31 the two memory cells turning on at
7:32 different gate voltages
7:35 we can conclude that the two memory
7:38 cells have different threshold voltages
7:40 and thus have different numbers of
7:42 electrons stored in the charge trap
7:45 when a charge trap turns on at a small voltage
7:46 voltage
7:49 it holds no extra electrons in its
7:50 charge trap
7:52 and we designate this low level of
7:54 stored charge
7:57 as a binary one when the charge trap
7:59 turns on at a higher voltage
8:01 it means there are a lot of electrons in
8:03 the charge trap
8:06 and the binary values stored is a zero
8:08 details of this inverted assignment are
8:12 mentioned in the creator's comments
8:14 let's take a short break and briefly
8:16 talk about this enterprise
8:19 class solid state drive from kioxia
8:22 here's a consumer class ssd
8:26 and here's an enterprise class ssd
8:29 they look similar from the outside but
8:31 are entirely different on the inside
8:34 keoxia provides these leading quality
8:35 enterprise class
8:40 pcie nvme solid-state drives
8:43 and they can fit in the same space but
8:44 have capacities
8:48 up to a whopping 30 terabytes and use a
8:50 proprietary architecture built with
8:51 their own
8:55 controller firmware and bics flash
8:59 3d tlc memory in order to deliver
9:01 incredibly high sustained read and write
9:04 performance and reliability
9:07 by the way tlc in this context stands for
9:08 for
9:11 triple level cell and is the marketing
9:12 term which means
9:14 three bits of information can be stored
9:15 in each cell
9:18 and now you might be getting an idea as
9:20 to how we can store three bits of information
9:22 information
9:24 and solve our puzzle in order to store
9:26 eight different values
9:29 or three bits of information eight
9:32 potential different levels of electrons
9:34 need to be placed onto the charge strap
9:36 resulting in eight different possible
9:38 threshold voltages
9:41 the level of charge on an individual trap
9:41 trap
9:43 is determined by a sequence of
9:44 increasing voltages
9:48 applied to the gate and then correlating
9:50 the specific level of voltage
9:52 at which the channel turned on with the
9:54 associated memory cell
9:56 when a set of memory cells are all next
9:57 to each other
10:00 this group is called a page and the same
10:03 voltage is applied to a gate that is
10:04 shared by
10:06 every memory cell in the page let's
10:08 cover up the level of charges in the
10:10 charge trap
10:12 as if we didn't know the stored value
10:15 the voltage applied to the shared gate
10:18 starts small and we check each and every
10:21 channel to see if electrons can flow through
10:22 through
10:25 and well this memory cell's channel has
10:27 electrons flowing through it and therefore
10:28 therefore
10:31 it's on that means there are no extra
10:34 electrons on the charge strap
10:37 and a 1 1 1 value is stored there
10:40 next we step up the voltage on the
10:41 shared gate
10:42 and check if any other channels have
10:44 turned on
10:47 and we see that this channel is now on
10:49 so that means that it has a slightly
10:51 higher threshold voltage
10:54 or just a few electrons on the charge trap
10:54 trap
10:58 and the stored value is one one
11:01 zero we continue stepping up the voltage
11:03 and correlate at which voltage each
11:04 channel turns on
11:07 and that gives us the corresponding
11:08 threshold voltage
11:10 which directly relates to the level of
11:13 stored charges on each memory cell's
11:14 charge trap
11:17 and the stored binary value in each cell
11:21 this process happens incredibly fast
11:23 in order to read information from
11:25 millions of cells
11:27 and read the megabytes of data your smartphone
11:28 smartphone
11:31 goes through this voltage stepping up
11:34 cycles thousands of times every second
11:36 fortunately the memory cells are
11:38 organized in pages
11:41 and every cell in a page shares a common
11:42 control gate
11:46 and thus all information from an entire page
11:47 page
11:50 is read simultaneously and now
11:53 our puzzle is all pieced together however
11:54 however
11:56 there's another puzzle how do we add
11:58 electrons to a charge trap
12:01 in other words how do we write to a
12:02 memory cell
12:05 the solution involves materials that are around
12:05 around
12:08 75 to 100 atoms thick
12:11 as well as quantum mechanics so that
12:14 topic is covered in a separate episode
12:15 that you can find
12:18 here this episode is part of a series of
12:21 episodes that explore solid state drives
12:24 3d nand and how we save information on smartphones
12:25 smartphones
12:28 tablets or pretty much any device in
12:29 this day and age
12:32 if you want you can watch this video a
12:33 second time
12:35 and if you do we recommend you check out
12:37 the creators comments in the english canada
12:38 canada
12:41 subtitles wherein we include details on dimensions
12:42 dimensions
12:45 exact threshold voltages and other stuff
12:48 thanks again to keoxia for sponsoring
12:49 this video
12:51 additionally we'd like to thank our
12:53 youtube membership supporters and
12:55 patreon supporters
12:58 for helping in our goal of exploring complex
12:58 complex
13:01 engineering concepts if you want to help
13:02 this channel
13:06 comment below like this video and subscribe
13:07 subscribe
13:10 thanks for watching and don't forget to
13:11 consider the conceptual
13:15 simplicity yet structural complexity
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